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=20 =20 =20 =20 =20 =20Op amps are extremely versatile and have become the amplifier of = choice for=20 very many applications. The advantages of integration also allow op amps = to be=20 included in many application specific integrated circuits (ASICs) where, = combined with other circuit elements, a chip can be designed to carry = out a=20 specific function, which for example, can vary from a dedicated=20 tone control or a programmable filter network to a complete audio or = communications system.
This section introduces some basic variations on the voltage=20 amplifiers described in Module 6.3 that are commonly used in many=20 circuits.
=20 =20The voltage follower shown in Fig. 6.6.1 looks rather like a non=20 inverting voltage amplifier, but without its feedback and input = resistors.=20 The gain of a non inverting voltage amplifier would normally be = described=20 using the values of Rf and Rin by the formula:
In the voltage follower circuit however, both Rin and=20 Rf are replace by simple conductors, and so both these values = in the=20 above formula will be extremely small, therefore the gain is 1. The = voltage=20 follower does not therefore, act as an amplifier, the output voltage = =E2=80=98follows=E2=80=99=20 the input voltage, but the circuit does have some very useful = properties.
Module 3.2 described how negative=20 feedback can be used to increase the input impedance, and reduce the = output=20 impedance of an amplifier. The voltage follower uses 100% negative = feedback that=20 is effectively voltage=20 derived and series fed, so the effect of the feedback on impedance = is=20 dramatic. The input impedance of the circuit is increased to typically = many=20 megohms (106 =CE=A9) or even teraohms (1012 = =CE=A9) while the output=20 impedance of the op amp remains very low, in the range of ohms to = hundreds of=20 ohms. As with any other negative feedback (NFB) amplifier noise and = distortion=20 are also reduced.
The voltage follower is therefore very useful as a buffer amplifier, = that=20 will reduce the loading effect on previous circuits and, because of its = low=20 output impedance will deliver more current to any following circuit.
Fig. 6.6.2 shows a differential amplifier with a single output. This=20 operating mode is a combination of both the inverting and the = non-inverting=20 amplifier. In this mode the output will be the difference between the = two=20 inputs, multiplied by the closed loop gain.
Setting the value of closed loop gain is normally achieved by = choosing the=20 ratio of the feedback and input resistors. In both the inverting and=20 non-inverting amplifiers only one input was used, the other input being=20 connected to ground.
In the differential amplifier however, both inputs are in use so two = pairs of=20 resistors are needed to control the gain, one pair for each input. It is = important that the gains from both inputs are equal, otherwise the = output would=20 be equal to the voltage difference and the difference in gain.
Therefore in Fig. 6.6.2 for equal gain at each input R1 should equal = R2 and=20 R3 should equal R4.
One problem with the circuit in Fig. 6.6.2 is that, compared with the = single=20 input op amp mode, the input impedance is quite low. Another problem, = especially=20 where a gain greater than 1 is required, is that it becomes difficult to = match=20 the two gains accurately enough, even with close tolerance resistors = because of=20 unequal input currents, and the very small differences in input voltages = that=20 may be amplified to produce larger errors at the output.
Both of the problems mentioned in the previous paragraph, relating to = input=20 impedance and resistor matching, can be remedied by using a slightly = more=20 complex design, the Instrumentation Amplifier, shown in Fig. 6.6.3.
This circuit addresses the problem of low input impedance by using = two=20 non-inverting buffer amplifiers at the inputs to increase input = impedance, and=20 are designed with feedback resistors that give a closed loop gain of = more than=20 1.
The problem of unmatched gains of the input buffer amplifiers is = solved by=20 the use of a shared input resistor (R2) so that the gain of both input=20 amplifiers is set by just a single resistor.
The output amplifier can now have a gain of 1 and R4, R5, R6 and R7 = can be=20 all the same value. The problem of producing amplifiers and resistors = with close=20 tolerances=20 and identical temperature=20 coefficients is made easier if they are produced on a single wafer = of=20 silicon within an integrated circuit. Integrated circuit instrumentation = amplifiers such as the INA114=20 from Texas Instruments are produced, = looking=20 very much like a single op amp but using a single resistor to set its = gain.
A summing amplifier is an extension of (usually) the inverting = amplifier,=20 which carries out a mathematical addition on a number of analogue = signals (AC or=20 DC) at its inputs. It can have a number of uses:
By applying an AC signal to one of the summing amplifier inputs, and = a DC=20 voltage to the other, the DC voltage is added to the AC signal, changing = the DC=20 level of the AC wave. An example application of this could be the Y = shift=20 control on an analogue oscilloscope changing the vertical position of = the=20 waveform.
D3 | D2 | D1 | D0 | Vout |
---|---|---|---|---|
0 | 0 | 0 | 0 | 0V |
0 | 0 | 0 | 1 | 333mV |
0 | 0 | 1 | 0 | 666mV |
0 | 0 | 1 | 1 | 999mV |
0 | 1 | 0 | 0 | 1.333V |
0 | 1 | 0 | 1 | 1.666V |
0 | 1 | 1 | 0 | 1.999V |
0 | 1 | 1 | 1 | 2.333V |
1 | 0 | 0 | 0 | 2.666V |
1 | 0 | 0 | 1 | 2.999V |
1 | 0 | 1 | 0 | 3.333V |
1 | 0 | 1 | 1 | 3.666V |
1 | 1 | 0 | 0 | 3.999V |
1 | 1 | 0 | 1 | 4.333V |
1 | 1 | 1 | 0 | 4.666V |
1 | 1 | 1 | 1 | 4.999V |
The simplest type of Digital to Analogue Converter (DAC) uses a = Summing=20 Amplifier and a weighted resistor network as shown in Fig. 6.6.5 where = resistors=20 having values in the ratio 1, 2, 4 and 8 are fed from a stable reference = voltage=20 and can be individually switched into the input circuit of the summing = op amp.=20 The amplifier output will have 16 different voltage levels, depending on = the 4=20 bit digital code applied to the inputs DO to D3. = Supposing=20 that Vref is 5volts, the output voltages for any possible = input code=20 would be as shown in the table in Fig 6.6.5.
The audio mixer shown in Fig. 6.6.6 uses a Summing Amplifier made = from an=20 inverting op amp with multiple input resistors (R1, R2 and R3), which = together=20 with the feedback resistor R5, add the individual signal input voltages = at the=20 inverting input of the op amp. In audio mixers R1 R2 and R3 will usually = be the=20 same value.
Because the summing amplifier used in stage one is based on an = inverting=20 amplifier, the signal at the output of stage one will be in anti-phase = to the=20 input signal, so to restore the signal to its original phase a second = inverting=20 amplifier is used. With R1 to R8 all of equal value, the gain of each = stage,=20 and therefore the overall gain, will be 1.
Adding an op amp to the pass= ive=20 wave shaping and filter circuits described in AC Theory Module 8 = overcomes=20 the problem that the gain of passive circuits is always less than 1, the = output=20 is always less than the input. This may be acceptable where only first = order=20 circuits (having only a single wave shaping or filter element) are used, = but=20 because the efficiency of the circuit is generally improved by using = multiple=20 circuit elements, for example using a low=20 pass filter and a high=20 pass filter in combination to make a band pass filter, second or = even fourth=20 order filters are often needed. In such cases the attenuation caused by = the=20 extra passive filter can cause an unacceptable reduction in signal=20 amplitude.
With active filters and wave shaping circuits, op amps are used to = overcome=20 the losses due to passive components, making multiple (2nd, 3rd, = 4th...etc.=20 order) filters possible that have superior performance such as sharper = cut off=20 and a higher Q=20 factor.
When op amps are used in wave shaping circuits, the operation of the = circuit=20 uses the characteristics of the amplifier together with the properties = of=20 resistors and capacitors to obtain changes to the wave shape.
The circuit in Fig. 6.6.7 uses a CR= =20 time constant of C1 x R2 (10exp-9 x 470exp3) =3D 470=C2=B5s to = convert a square=20 wave with a periodic time of 1/100Hz =3D 10ms, to positive and = negative=20 pulses. The time constant of a = differentiator=20 is shorter than the periodic time of the wave.
Temporarily ignoring R1, the operation is as follows:
The circuit illustrated in Fig. 6.6.7 is basically that of an inverting=20 amplifier, but with the addition of a capacitor at the inverting = input. If a=20 steady voltage is applied to the left hand plate of C1 there will a = voltage=20 across C1 as the right hand plate is held at 0V (virtual ground) by the = action=20 of the op amp keeping the inverting input at the same voltage as the=20 non-inverting input, which is connected to 0V. While the input voltage = (a square=20 wave) remains at a constant level, there will be no current flowing = through C1=20 and therefore no current through R2. The output voltage will also be=20 constant.
When the input voltage suddenly changes, there will be a sudden pulse = of=20 current into the capacitor as it quickly charges (due to the short CR= =20 time constant) to the new level. Supposing the input voltage has = gone more=20 positive, the op amp output will go negative to keep the inverting input = at 0V.=20 Notice that the active circuit produces a pulse in the opposite phase to = that=20 expected from a pa= ssive=20 differentiator circuit due to the action of the inverting = amplifier.
The op amp differentiator has produced good (though inverted) = differentiation=20 at low frequency, and the amplitude of the pulses depends on the rate of = change=20 of the input wave and also on the gain of the op amp. The gain will in = turn=20 depend on the ratio of R2 to the = capacitive=20 reactance (XC) of C1. However reactance reduces as = frequency=20 increases and so the gain of the op amp will increase with frequency. At = some=20 high frequency the reactance of C1 will have reduced to practically = 0=CE=A9 and the=20 gain of the op amp will be almost infinitely high. This will cause = serious=20 problems of high levels of noise together with instability. The circuit = will=20 start to oscillate uncontrollably. The purpose of R1 is to help prevent = this=20 instability, as the reactance of C1 reduces it will at some frequency = fall below=20 the resistance value of R1, and as C1 and R1 are in series the low value = of=20 XC becomes irrelevant and the ratio controlling the maximum = gain will=20 now be R2/R1.
With both passive and active circuits the differentiator wave shaping = circuit=20 shown in Fig. 6.6.7 also acts as a high pass filter when the input is a = sine=20 wave. However with active versions of the circuit there is a significant = difference to the passive circuit. Because the gain of the op amp falls = off at=20 some frequency due to its power=20 bandwidth and slew=20 rate limitations. This can affect its high frequency operation so = that an=20 active high pass filter will also behave to some extent as a band pass = filter,=20 with attenuation both below and above a central pass band as shown in = Fig.=20 6.6.8. This can be a problem, but also an advantage if the frequencies = at which=20 the low and high corner frequencies are managed by the choice of = appropriate=20 component values.
In the op amp integrator circuit the capacitor is inserted in the = feedback=20 loop and creates a CR time constant with R1 at the inverting input. This = point=20 is held at virtual ground by the action of the op amp. As long as the = input is=20 at 0V there will be no current through the resistor R1, as the inverting = input=20 of the LM324 is at virtual ground.
C will be in a discharged state because of the presence of R2, which = prevents=20 C1 holding some charge from a previous state. If this were to happen the = output=20 (connected to the right hand plate of C1) could easily be driven to = either=20 +VS or =E2=88=92VS causing the op amp to = =E2=80=98lock up=E2=80=99 and be unable=20 to restore a normal output voltage.
If a square wave applied to Vin now enters its positive = half cycle=20 and produces a steady positive DC voltage at Vin a current = will flow=20 through R1 and begin to charge C1. Because the voltage at the junction = of R1 and=20 C1 (the inverting input of the LM324) is held at virtual ground, the = voltage at=20 the op amp output, (connected to the right hand plate of C1), will begin = to fall=20 at a rate controlled by the CR time constant. The output voltage will = continue=20 falling, trying to reach a negative voltage, equal and opposite to=20 Vin This action causes a relatively linear negative going = ramp at the=20 output until (well before the end of one time constant), the input = square wave=20 suddenly changes polarity.
Changing the voltage at Vin back to its lower level at the = start=20 of the negative going half cycle of the input square wave will cause C1 = to begin=20 to discharge, and to keep the inverting input at 0V, the voltage at the = op amp=20 output will begin to increase in a linear manner. This continues until = the input=20 suddenly goes positive once more at the start of the next cycle.
To produce a linear ramp on the output triangular waveform, the CR = time=20 constant of the integrator circuit should be similar to, or longer than = half the=20 periodic time of the input wave. In the case illustrated in Fig. 6.6.9, = a time=20 constant R1 x C1 (10exp3 x 22exp-9) =3D 220=C2=B5s converts a 1kHz = square wave with a=20 periodic time of 1/2exp3Hz =3D 500=C2=B5s/2 =3D 250=C2=B5s into a = reasonably linear triangular=20 wave.
Fig. 6.6.10 shows a 2nd order Sallen-Key low pass filter with a = double CR low=20 pass filter network. Such filters are normally designed using graphs and = tables=20 of component values for particular frequencies, as the design of multi = order=20 filter networks using mathematics is extremely complex and time = consuming. An=20 alternative is to use multi stage programmable filters, which contain = several=20 active filters in a single integrated circuit. These are of two main = designs,=20 either switched capacitor or analogue filters. Fig 6.6.11 illustrates a = typical=20 analogue example, the UAF42<= /A>=20 from Texas Instruments It contains = four=20 separate analogue active filters that can be digitally programmed to = create any=20 combination of the four main filter types.