If you have a voltage divider where each =
resistor=20
has 5 ppm/=C2=B0C drift, what is the worst-case drift? That is the =
loaded=20
question I posed to my colleagues recently (only after figuring out the =
answer=20
myself, of course) while working on a low-drift current sensing =
reference design=20
(TIPD156). The =E2=80=98obvious=E2=80=99 =
answer is 10 ppm/=C2=B0C. It=20
turns out to be just 5 ppm/=C2=B0C, but only when the voltage divider =
ratio is=20
=C2=BD. Let us delve deeper into the answer to this obvious, yet =
not-so-obvious=20
question.
Figure 1 depicts a discrete solution that provides a reference =
voltage=20
(VREF) and bias voltage (VBIAS) based on the ratio =
of=20
R1 and R2.
Figure 1: Dual reference discrete topology
At the time it was =E2=80=98obvious=E2=80=99 that the overall drift =
of the resistor divider=20
is =
(5 ppm/=C2=B0C) + (5 ppm/=C2=B0C) =3D 10&nb=
sp;ppm/=C2=B0C. =20
Just to be sure, though, I ran a simulation. Figure 2 depicts the =
result=20
of the TINA-TI simulation where R2 drifts in =
the=20
positive direction, R1 drifts negatively, and the change in=20
temperature is 100=C2=B0C.
Figure 2: Vbias after R1 and R2 drift
Calculating the gain error yields 0.05% (500 ppm or 5.0 ppm/=C2=B0C), =
which is the=20
drift of one resistor=E2=80=A6not their sum!
Now let=E2=80=99s examine the familiar voltage divider =
circuit=E2=80=99s gain ratio and=20
re-arrange it as shown in Equation ( 1 ).
Where
=CE=B1 is the ratio of R1 and R2, and =
ultimately relates to=20
the gain of the circuit. For example, if =CE=B1=3D1, the gain is =
=C2=BD. So, as=20
=CE=B1=E2=86=920, the gain=E2=86=921. Similarly, as =
=CE=B1=E2=86=92=E2=88=9E, gain=E2=86=92 0.
The actual gain of the circuit over temperature will depend on the =
drift of=20
the resistors, which is shown in Equation ( 3 ) by =CE=B4. =
To be=20
consistent with the simulation, R2 drifts positively and=20
R1 negatively.
Equation ( 4 ) calculates the gain error. For =
simplicity, it is=20
not converted to a percentage (if you want to do that, simply multiply =
it by 100=20
but be careful when converting to ppm).
Using Equations ( 1 ) to ( 3 ), Equation =
( 4=20
) simplifies to:
Notice that the gain error depends on both the drift (=CE=B4) and the =
circuit gain=20
(related to =CE=B1). Furthermore, if =CE=B1=3D1 (circuit =
gain=3D=C2=BD), the gain error=20
simplifies to =CE=B4, which is exactly what the simulation shows!
Figure 3 is a plot of the gain error versus the circuit gain for this =
design=20
(5 ppm/=C2=B0C resistor drift, or 500 ppm total drift over =
100=C2=B0C). Notice=20
that the gain error is 500 ppm when the circuit gain is =C2=BD. =
Also notice=20
that as the circuit gain increases, the gain error decreases and vice =
versa.
In summary, the drift of the voltage divider was not as =
expected=E2=80=A6it is not=20
the simple sum and it depends on the circuit gain. So, next time =
you=E2=80=99re=20
designing a circuit and come across one of those =
=E2=80=98obvious=E2=80=99 conclusions, you may=20
want to double-check it with TINA-TI!
If you have any similar =E2=80=98obvious=E2=80=99 experiences, please =
share them in the=20
comments section!