Engineers encounter large array of logic=20
devices, but selecting the device that finally =E2=80=9Cfits the bill =
and cuts the deal=E2=80=9D=20
for the system can be a challenge to conquer. There are also =
time-consuming=20
tasks: reviewing application notes and data sheets, asking field =
application=20
engineers how the part works, and dealing with design issues after =
putting the=20
device into a design.
In this post, I will answer a few common questions and issues about =
logic =
devices in the hope that I can save you time and that awful feeling of =
not=20
knowing where to start debugging.
Q: Can I have the input greater than Vcc?
A: It depends. Today=E2=80=99s devices can handle overshoots and =
undershoots fairly=20
well; however, to have a constant voltage higher than Vcc, =
the device=20
must be built to handle it. The datasheets usually specify if the device =
is=20
overvoltage-tolerant or not, which is a direct indicator of its ability =
to=20
handle higher inputs. Looking at the electrical specifications of the=20
input-voltage ratings on the data sheet, if it specifies something like=20
Vin=3D Vcc +0.5V, that indicates that the input =
has a diode=20
to Vcc. Applying any voltage higher than Vcc =
starts to=20
forward bias the diode which is unsafe for the device . This also means =
that you=20
cannot apply voltage higher than Vcc at the input.
Q: Will the device safely handle higher input and output voltages =
when it is=20
powered off?
A: This partly ties back to the first question. If the part =
doesn=E2=80=99t have a=20
diode to Vcc, as mentioned above, then check for the =
Ioff=20
parameter in the datasheet; this indicates that the device can handle =
voltages=20
on its inputs and/or outputs when the device is turned off. The device =
generally=20
starts to shut down around 0.6V and goes into Ioff mode =
around 0.5V=20
Vcc as indicated in Figure 1.The Ioff =
specification also=20
states how much current goes into the device=E2=80=99s inputs /outputs =
during=20
Ioff mode. This Ioff protection circuitry enables =
you to=20
bypass the Vcc + 0.5V input condition on the electrical=20
specification, but this is valid only when Vcc is powered =
off. For=20
any Vcc higher than 0V, the diode is forward biased for =
inputs=20
greater than Vcc.
Figure1: Ioff plot for =
SN74CB3Q3384A=
=20
bus switch.
Q: Why is my device drawing higher than normal current?
A: Check the input voltages with respect to Vcc. As shown =
in=20
Figure 2 below, Icc current consumption is highest at about =
half the=20
Vcc for CMOS (Complementary Metal oxide semiconductor) =
parts.
Figure 2: Typical=20
Vin vs. Icc plot for CMOS
The higher current can also start to heat up the device; without =
appropriate=20
care on the heat sink design, this can be damaging to the device or =
reduce the=20
reliability of the system. You can also use level translators to make =
the=20
Vcc and inputs compatible to avoid these issues.
I hope this brief Q&A helps you with your next logic design. =
Comment=20
below to let me know if this was helpful and if you would like me to =
cover any=20
other common issues encountered during logic design or if there are =
other logic=20
topics in general you would like us to cover on Analog Wire.
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