From: "Saved by Internet Explorer 11" Subject: PCB Stack-Up - Part 4 Date: Thu, 2 Jul 2015 15:06:40 -0700 MIME-Version: 1.0 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Content-Location: http://www.hottconsultants.com/techtips/pcb-stack-up-4.html X-MimeOLE: Produced By Microsoft MimeOLE V6.1.7601.17609 =20 =20 =20 = PCB Stack-Up=20 - Part 4 =20

Henry Ott=20 Consultants

Electromagnetic Compatibility Consulting = and=20 Training

PCB Stack-Up

Part 4. Eight-Layer = Boards


An eight-layer board can be used to add two more routing layers = or to=20 improve EMC performance by adding two more planes.  Although we see = examples of both cases, I would say that the majority of eight layer = board=20 stack-ups are used to improve EMC performance rather than add additional = routing=20 layers.  The percentage increase in cost of an eight-layer board = over a=20 six-layer board is less than the percentage increase in going from four = to six=20 layers, hence making it easier to justify the cost increase for improved = EMC=20 performance.  Therefore, most eight-layer boards (and all the ones = that we=20 will concentrate on here) consist of four wiring layers and four planes. =

An eight-layer board provides us, for the first time, the opportunity = to=20 easily satisfy all of the five originally stated objectives.  = Although there are many stack-ups possible, we will only discuss a few of them = that have=20 proven themselves by providing excellent EMC performance.  As = stated above,=20 eight layers is usually used to improve the EMC performance of the = board, not to=20 increase the number of routing layers.

An eight-layer board with six routing layers is definitely = not recommended, no matter how you decide to stack-up the layers.  If = you need=20 six routing layers you should be using a ten-layer board.  = Therefore, an=20 eight-layer board can be thought of as a six-layer board with optimum = EMC=20 performance.
 

The basic stack-up of an eight-layer board with excellent EMC = performance is=20 shown in Fig 9.
 

  ________________Mounting Pads/Low Freq. Signals =
 =20 ________________Pwr.
  ________________Gnd.
 =20 ________________High Freq. Signals
  ________________High = Freq. = Signals           =             &= nbsp;           &n= bsp;           &nb= sp;     =20 Figure  9
  ________________Gnd.
 =20 ________________Pwr.
  ________________Low Freq. Signals/Test = Pads


This configuration satisfies all the objectives listed in Part = 1.  All signal layers are adjacent to planes, and all the layers are = closely coupled together.  The high-speed signals are buried between = planes, therefore the planes provide shielding to reduce the emissions from = these signals.  In addition the board uses multiple ground planes, thus decreasing the ground impedance.

For best EMC performance and Signal Integrity, when high frequency = signals=20 change layers (e.g., from layer 4 to 5) you should add a = ground-to-ground via=20 between the two ground planes, near the signal via, in order to provide = an=20 adjacent return path for the current.  See "Changing Reference = Planes" in=20 Part 6, (Retu= rn=20 Path Discontinuties) for a discussion of why this is = important.

The stack-up in Fig. 9 can be further improved by using some form of = embedded=20 PCB capacitance technology (e.g. Zycon Buried Capacitance=FA) for layers = 2-3 and=20 6-7. For more information on embedded PCB capacitance technology, see = our Te= ch Tip on=20 Decoupling.   This approach provides a significant = improvement=20 in the high frequency decoupling and may allow the use of significantly = fewer=20 discrete decoupling capacitors.
 

Another excellent configuration, and one of my favorite, is shown in = Figure=20 10.  This configuration is similar to that of Fig. 7 but includes = two outer=20 layer ground planes.  With this arrangement all routing layers are = buried=20 between planes and are therefore shielded.
 

  ________________Ground/Mounting Pads
 =20 ________________Signal(H1)
  ________________Gnd.
 =20 ________________Signal (V1)
            &= nbsp;           &n= bsp;           &nb= sp;           &nbs= p;            = ;            =             &= nbsp;           &n= bsp;           &nb= sp;           &nbs= p;    Figure 10=20
  ________________Signal (H2)
  = ________________Pwr.=20
  ________________Signal (V2)
 =20 ________________Ground/Mounting pads if double sided surface = mount


H1 indicates the horizontal routing layer for signal 1, and V1 = indicates the vertical routing layer for signal 1.  H2 and V2 represent the = same for=20 signal 2.   Although not commonly used this configuration also = satisfies all the five objectives presented previously, and has the = added=20 advantage of routing orthogonal signals adjacent to the same plane. To=20 understand why this is important see the section on Retu= rn Path Discontinuites.  Typical layer spacing for this = configuration might be 0.010"/0.005"/0.005"/0.20"/0.005"/0.005"/0.010"
 

Another possibility for an eight-layer board is to modify Fig. 10 by = moving=20 the planes to the center as shown in Fig. 11.  This has the = advantage of=20 having a tightly coupled power-ground plane pair at the expense of not = being=20 able to shield the traces.
 

  ________________Signal(H1)
  = ________________Gnd.=20
  ________________Signal (V1) =20

  ________________Gnd.
  = ________________Pwr.         = ;            =             &= nbsp; =20 Figure 11

  ________________Signal (H2)
  ________________Gnd. =
  ________________Signal (V2)

This is basically = an eight-layer version of Fig. 7.  It has all the advantages listed = for Fig. 7,  plus a tightly coupled power-ground plane pair in the center. = Typical layer spacing for this configuration might be 0.006"/0.006"/0.015"/0.006"/0.015"/0.006"/0.006."  This = configuration=20 satisfies objectives 1 and 2, 3, and 5, but not 4.  This is an = excellent=20 performing configuration with good signal intergity and is often = preferred over=20 the stack-up of Figure 10 because of the tightly coupled power/ground=20 planes.  One of my favorites.

The stack-up in Fig. 11 can be further improved by using some form of = em= bedded=20 PCB capacitance technology (e.g. Zycon Buried Capacitance=FA) for = layers 4-5.=20

There is very little EMC advantage to use a board with more than = eight layers.  More that eight layers is usually used only when = additional layers are required for signal trace routing.  If six routing = layers are=20 needed,  a ten-layer board should be used.
 

=A9 2002-2004 Henry W. = Ott           &nbs= p;            = ;     Henry Ott Consultants,  48 Baker Road  Livingston,  = NJ  07039  (973) 992-1793


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Henry Ott Consultants
48 Baker Road Livingston, NJ 07039
Phone: 973-992-1793,   FAX: = 973-533-1442

September 13, 2004