From: "Saved by Internet Explorer 11" Subject: PCB Stack-Up - Part 5 Date: Thu, 2 Jul 2015 15:06:51 -0700 MIME-Version: 1.0 Content-Type: text/html; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable Content-Location: http://www.hottconsultants.com/techtips/pcb-stack-up-5.html X-MimeOLE: Produced By Microsoft MimeOLE V6.1.7601.17609 =20 =20 =20 = PCB Stack-Up=20 - Part 5 =20

Henry Ott=20 Consultants

Electromagnetic Compatibility Consulting = and=20 Training

PCB Stack-Up

Part 5. Ten-Layer Boards

A ten-layer board should be used when six routing layers are required. Ten-layer boards, therefore, usually have six signal = layers and=20 four planes. Having more than six signal layers on a ten-layer = board is=20 not recommended. Ten-layers is also the largest number of = layers=20 that can usually be conveniently fabricated in a 0.062" thick = board. =20 Occasionally you will see a twelve-layer board fabricated as a 0.062" = thick=20 board, but the number of fabricators capable of producing it are = limited..

High layer count boards (ten +) require thin dielectrics (typically = 0.006" or=20 less on a 0.062" thick board) and therefore they automatically have = tight=20 coupling between layers. When properly stacked and routed they can = meet=20 all of our objectives and will have excellent EMC performance and signal = integrity.

A very common and nearly ideal stack-up for a ten-layer board is = shown in=20 Figure 12. The reason that this stack-up has such good performance = is the=20 tight coupling of the signal and return planes, the shielding of the = high-speed=20 signal layers, the existence of multiple ground planes, as well as a = tightly=20 coupled power/ground plane pair in the center of the board. = High-speed=20 signals normally would be routed on the signal layers buried between = planes=20 (layers 3-4 and 7-8 in this case).

________________Signal (low-speed signals) =
=20 ________________Gnd.
________________Signal (high-speed = signals=20 & clocks)
________________Signal (high-speed signals = &=20 clocks)
= ________________Pwr. = ; = &= nbsp; &n= bsp; &nb= sp; &nbs= p; = ; =20 Figure 12
________________Gnd.
=20 ________________Signal (high-speed signals & clocks)
=20 ________________Signal (high-speed signals & clocks)
=20 ________________Gnd. or Pwr.
________________Signal = (low-speed=20 signals)

The common way to pair orthogonally routed signals in this = configuration would be to pair layers 1 & 10 (carrying only low-frequency = signals), as=20 well as pairing layers 3 & 4, and layers 7 & 8 (both carrying = high-speed=20 signals). By paring signals in this manner, the planes on layers 2 = and 9=20 provide shielding to the high-frequency signal traces on the inner = layers. =20 In addition the signals on layers 3 & 4 are isolated from the = signals on=20 layers 7 & 8 by the center power/ground plane pair. For = example,=20 high-speed clocks might be routed on one of these pairs, and high-speed = address=20 and data buses routed on the other pair. In this way the bus lines = are=20 protected, against being contaminated with clock noise, by the = intervening=20 planes.

This configuration satisfies all of the five original objectives. =

Another possibility for routing orthogonal signals on the ten-layer = board=20 shown in Fig. 12 is to pair layers 1 & 3, layers 4 & 7, and = layers 8=20 & 10. In the case of layer pairs 1 & 3 as well as 8 = &=20 10, this has the advantage of routing orthogonal signals with reference = to the=20 same plane. The disadvantage, of course, is that if layers 1 = and/or 10=20 have high frequency signals on them there is no inherent shielding = provided by=20 the PCB planes. Therefore, these signal layers should be placed = very close=20 to their adjacent plane (which occurs naturally in the case of a = ten-layer=20 board).

Each of the routing configurations discussed above has some = advantages and=20 some disadvantages, either can be made to provide good EMC and signal = integrity=20 performance if laid out carefully.

The stack-up in Fig. 12 can be further improved on by the use of some = form of=20 em= bedded=20 PCB capacitance technology (e.g. Zycon Buried Capacitance=FA ) = for layers=20 5 and 6, thereby improving the high-frequency power/ground plane = decoupling,=20

Fig. 13 shows another possible stack-up for a ten-layer board. =

________________Ground/Mounting Pads
=20 ________________Signal (H1)
________________Signal (V1) =
________________Ground
________________Signal = (H2) &nb= sp; &nbs= p; = ; = &= nbsp; &n= bsp; =20 Figure 13
________________Signal (V2) =
=20 ________________Power
________________Signal (H3) =
=20 ________________Signal (V3)
= ________________Ground/Mounting pads=20 if double sided surface mount

This configuration gives up the closely spaced power/ground plane = pair. In return it provides three signal- routing-layer pairs shielded by the = ground=20 planes on the outer layers of the board, and isolated from each other by = the=20 internal power and ground plane. All signal layers are shielded = and=20 isolated from each other in this configuration. The stack-up of = Fig. 13 is=20 very desirable if you have very few low-speed signals to put on the = outer signal=20 layers (as in Fig. 12) and most of your signals are high-speed, = since it=20 provides three pairs of shielded signal routing layers.

One concern with this stack-up relates to how badly the outside = ground planes=20 will be cut-up by the component mounting pads and vias on a high density = PCB. This issue has to be addressed and the outside layers = carefully=20 laid out.

This configuration satisfies objectives 1, 2, 4, and 5, but not 3. =

A third possibility is shown in Fig. 14. This stack-up allows = the=20 routing of orthogonal signals adjacent to the same plane, but in the = process=20 also has to give up the closely spaced power/ground planes. This=20 configuration is similar to the eight-layer board shown in Fig. 10, with = the=20 addition of the two outer low-frequency routing layers. =

________________Signal (low-speed signals) =
=20 ________________Pwr.
________________Signal (H1) =
=20 ________________Gnd.
________________ Signal = (V1) &nb= sp; &nbs= p; = ; = &= nbsp; &n= bsp; =20 Figure 14
________________ Signal (H2) =
=20 ________________Gnd.
________________Signal (V2) =
=20 ________________Gnd. or Pwr.
________________Signal = (low-speed=20 signals)

The configuration in Fig. 14 satisfies objectives 1, 2, 4, and 5, but = not=20 3. It, however, has the additional advantage that orthogonal = routed=20 signals always reference the same plane.

The stack-up in Fig. 14 can be further improved by the use of some = form of=20 em= bedded=20 PCB capacitance technology (e.g. Zycon Buried Capacitance=FA ) = for layers=20 2 and 9 (thereby satisfying objective 3). This, however, = effectively=20 converts it to a twelve-layer board.

Summary

The previous sections have discussed various ways to stack-up = high-speed, digital logic, PCBs having from four to ten layers. A good PCB = stack-up reduces radiation, improves signal quality, and helps aid in the = decoupling of=20 the power bus. No one stack-up is best, there is a number of = viable options in each case and some compromise of objectives is usually = necessary.=20

In addition to the number of layers, the type of layer (plane or = signal), and=20 the ordering of the layers, the following factors are also very = important in=20 determining the EMC performance of the board:

The layer spacing.
The assigning of signal layer pairs for orthogonal routing of=20 signals.
The assignment of signals (clock, bus, high-speed, low-frequency, = etc.) to=20 which signal-routing-layer pairs.

This discussion on board stack-up has assumed a standard 0.062" = thick=20 board, with symmetrical cross-section, and conventional via technology. If blind, buried, or micro vias are = considered,=20 other factors come into play and additional board stack-ups not only = become=20 possible but in many cases desirable. =

=A9 2002 Henry W. = Ott &nbs= p; = ; = Henry Ott Consultants, 48 Baker Road Livingston, = NJ 07039 (973) 992-1793

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Return to = HOC home=20 page.

Henry Ott Consultants

48 Baker Road Livingston, NJ 07039

Phone: 973-992-1793, FAX: = 973-533-1442

June=20 14, 2002