Clean Power for Every IC, Part 2: = Choosing and=20 Using Your Bypass Capacitors
Articles That Provide Supporting Information
Previous Article in This Series
Capacitance: How Much Is Enough?
At the end of the previous article, we introduced the idea that a = particular=20 capacitor=E2=80=99s performance as part of a power-supply bypass network = is dependent=20 upon two of its nonideal characteristics, namely equivalent series=20 resistance (ESR) and equivalent series inductance (ESL). Actually, it = turns out=20 that the part=E2=80=99s exact capacitance is not particularly important = in the context=20 of power-supply bypassing. This is why IC manufacturers can confidently = offer=20 the same recommendation=E2=80=94=E2=80=9C0.1 =C2=B5F ceramic capacitor = at each power pin=E2=80=9D=E2=80=94for a wide=20 variety of analog and digital ICs. Why is the capacitance of relatively = minor=20 importance? Well, recall that capacitance is simply the ratio of charge = stored=20 on the capacitor=E2=80=99s plates to the voltage across the = capacitor:
So capacitance tells you how much charge the capacitor can store per = volt=20 across the capacitor. If a fully charged 10 =C2=B5F and 0.1 =C2=B5F = capacitor are in=20 parallel between ground and a 5 V power rail, the larger capacitor has = 50 =C3=97=20 10-6 coulombs of charge (10 =C3=97 = 10-6 coulombs per=20 volt) and the smaller one has 0.5 =C3=97 10-6 coulombs = (0.1 =C3=97=20 10-6 coulombs per volt).
How much charge is this in relation to a power-supply bypassing = application?=20 Let=E2=80=99s take a look: Current (in amperes) is defined as the amount = of charge (in=20 coulombs) flowing through a conductor per unit time (seconds). Another = way to=20 express this is with a derivative:
Current, then, is the rate of change of charge with respect to time. = This=20 means that if we integrate current with respect to time, we have total=20 charge:
Now, let=E2=80=99s go back to the simulated power-supply disturbances = discussed in=20 the previous article. The following current disturbance is generated in = the=20 circuit with 8 inverters and 1 nH of parasitic inductance in series with = the=20 power-supply source resistance:
LTSpice doesn=E2=80=99t give us the actual integration, but we can = calculate it by=20 multiplying the average current (26.3 =C2=B5A) by the interval (114 = =C2=B5s - 98 =C2=B5s =3D 16=20 =C2=B5s). Thus, the total charge required to compensate for this = disturbance is 26.3=20 =C2=B5A =C3=97 16 =C2=B5s =3D 4.2 =C3=97 10-10 coulombs. = This is about 1000 times=20 less charge than we have stored in our 0.1 =C2=B5F = capacitor.
This simulation is highly simplified=E2=80=94the amount of charge = required would=20 depend on the number of inverters in the IC, the electrical = characteristics of=20 the transistors, and so forth. Nonetheless, we can still conclude based = on these=20 calculations that a single 0.1 =C2=B5F capacitor can store much more = charge than is=20 required to compensate for high-frequency current spikes generated by = digital=20 switching behavior. And this, in turn, demonstrates why the exact = capacitance of=20 a bypass capacitor is not particularly important: as long as the = capacitor can=20 store enough charge, the capacitance value is acceptable. It turns out = that 0.1=20 =C2=B5F is a convenient value, but 1 =C2=B5F or even 0.01 =C2=B5F might = be equally appropriate=20 in terms of capacitance.
So now we have another question to confront: Clearly a 10 =C2=B5F = capacitor would=20 provide more than enough charge storage for bypassing=20 requirements, so why bother with the 0.1 =C2=B5F cap? This brings = us back to our=20 discussion of ESR and ESL.
The Secret Life of a Capacitor
As the following equivalent circuit demonstrates, there is a lot more = going=20 on inside a capacitor than mere capacitance:
For this discussion we don=E2=80=99t need to worry about = Rpar (which=20 accounts for leakage current through the dielectric) or = RDA and=20 CDA (which together account for dielectric absorption). = Thus, we=20 have this simplified equivalent circuit:
The problem here should be readily apparent. Our bypass capacitor is = intended=20 to rapidly supply current during transient disturbances on the power = line, yet=20 now we have two components that impede the flow of = current: a=20 resistor, which presents a fixed impedance regardless of frequency, and = an=20 inductor, which presents higher impedance as frequency increases. At = this=20 juncture it is important to understand that ESR and ESL are determined = primarily=20 by a capacitor=E2=80=99s =E2=80=9Ctype=E2=80=9D (ceramic, tantalum, = polymer, etc.) and package. Ceramic=20 caps are the most popular for bypassing because they exhibit low ESR and = ESL=20 (they are also inexpensive). Next in line are tantalums; these offer = moderate=20 ESR and ESL along with high capacitance-to-volume ratio, and thus they = are used=20 for higher-value bypass capacitors intended to compensate for = lower-frequency=20 variations in the power line. For both ceramic and tantalum caps, larger = packages generally correspond to higher ESL. The following table, taken = from a=20 technical report published by AVX Corporation, lists ESL values for = different=20 surface-mount packages:
| Case Size | Inductance (pH) |
|---|---|
| 0603 (ceramic) | 850 |
| 0805 (ceramic) | 1050 |
| 1206 (ceramic) | 1250 |
| 1210 (ceramic) | 1020 |
| 0805 (tantalum) | 1600 |
| 1206 (tantalum) | 2200 |
| 1210 (tantalum) | 2250 |
| 2312 (tantalum) | 2800 |
Incorporating ESR considerations into the design process is fairly=20 straightforward: small-value capacitors intended to deal with = high-frequency=20 power-line noise must have low ESR. The ESL factor, though, is somewhat = more=20 complicated. The following plot shows the impedance of a 0.1 =C2=B5F, = 0603 ceramic=20 capacitor with 850 pH of ESL and 50 m=E2=84=A6 of ESR:
As discussed in the previous article, a bypass capacitor should = provide a=20 low-impedance path that allows high-frequency noise to =E2=80=9Cpass = by=E2=80=9D the IC on its=20 way to the circuit=E2=80=99s ground node. An ideal capacitor would = accomplish this=20 easily, since a capacitor=E2=80=99s impedance decreases with increasing = frequency. But=20 the above plot tells a different story: at a certain frequency the ESL = starts to=20 dominate the capacitance, such that the impedance actually begins to=20 rise with frequency. Now let=E2=80=99s imagine that = instead of the ceramic=20 cap above we decided to use a 1 =C2=B5F tantalum capacitor with 2200 pH = of ESL and=20 1.5 =E2=84=A6 of ESR:
The impedance of the tantalum starts out lower than that of the = ceramic=20 because of its higher capacitance, but the effect of higher ESR and ESL = causes=20 the impedance to level out at around 100 kHz, such that the impedance of = the=20 ceramic is actually 10 times lower than that of the = tantalum at 10=20 MHz. So, if the circuit is susceptible to noise at frequencies around 10 = MHz,=20 the ceramic capacitor would be far more effective than the tantalum = capacitor,=20 even though the tantalum has higher capacitance. Furthermore, if we are = dealing=20 with very high noise frequencies, even this ceramic cap might present = too much=20 impedance. In such a case, we would need lower ESL, which means a = smaller=20 package. This plot compares the original 0603 cap with a 0.01 =C2=B5F = ceramic with=20 only 500 pH of ESL (a value that might be achievable with the 0402 = package):
At first glance it seems like we can=E2=80=99t win: the 0402 cap = improves the=20 high-frequency performance, but the impedance is worse than that of the = 0603=20 from low frequency all the way to 50 MHz. We can win, = though: we=20 can put all three of these capacitors in parallel, and at any particular = frequency the overall impedance will be determined by the lowest = impedance among=20 the three.
So now we have a bypass network that maintains relatively low = impedance over=20 a very wide range of frequencies. The only surprise here is the peak at = 50 MHz=20 where the overall impedance is higher than the individual impedances. = This is=20 referred to as an anti-resonance peak, and you need to watch out for = these=20 wherever a decreasing (i.e., capacitance-dominant) impedance intersects = with an=20 increasing (i.e., inductance-dominant) impedance.
Don=E2=80=99t Ruin a Good Design with a Bad Layout
Proper PCB layout is a critical aspect of bypass design=E2=80=94for = example, engineers at Texas Instruments found that = extending the=20 distance between a 0.1 =C2=B5F cap and the IC=E2=80=99s power pin from = 0.3 inches to 1 inch=20 increased the power-line ringing amplitude from 250 mV to 600 mV. = Fortunately,=20 the rules for laying out bypass capacitors are simple: minimize = resistance,=20 minimize inductance. This is accomplished by placing the capacitor as = close to=20 the power pin as possible and using the shortest possible traces for all = connections. Ideally, both the ground and the power rail can be accessed = through=20 vias to planes:
Bypass Cap Recap
We now have enough information to formulate a concise set of = guidelines for=20 successful bypassing:
- When in doubt, give each power pin a 0.1 =C2=B5F ceramic cap, = preferably size=20 0805 or smaller, in parallel with a 10 =C2=B5F tantalum or = ceramic.
- You can probably omit the 10 =C2=B5F cap, or replace it with = something smaller,=20 if you are concerned only about high-frequency noise.
- If you need to compensate for long-term supply deviations that = will=20 require large amounts of stored charge, you may need to give each IC = an=20 additional larger capacitor, say 47 =C2=B5F.
- If your design includes very high frequencies or particularly = sensitive=20 circuitry, use a simulator to analyze the AC response of your bypass = network.=20 (It might be difficult to find solid specs for ESR and ESL, especially = considering that capacitor ESR can vary significantly with = frequency=E2=80=94just do=20 the best you can.) If necessary, include lower-ESL ceramic caps to = improve the=20 high-frequency impedance characteristics.
- Locate the high-frequency ceramic caps as close to the power pin = as=20 possible, and use short traces and vias to minimize parasitic = inductance and=20 resistance. The location of larger capacitors intended for = low-frequency=20 bypassing is not quite as critical, but these also should be close to = the=20 IC=E2=80=94within a half-inch or so.
Next Article in Series: Clean=20 Power for Every IC, Part 3: Understanding Ferrite Beads
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Great article, thanks! Another choice for capacitor position = would be=20 on the other side of the board, directly under the IC, if = that=E2=80=99s an=20 option.